/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/********************************************************************************************************
 *  \file     Adc_Ip.h                                                                               *
 *  \brief    This file contains internal interfaces of Adc Ip Level                                    *
 *                                                                                                      *
 * <table>                                                                                              *
 * <tr><th>Date           <th>Version                                                                   *
 * <tr><td>2023/08/29     <td>1.0.0                                                                     *
 * </table>                                                                                             *
 *******************************************************************************************************/

#ifndef ADC_HW_E3_H
#define ADC_HW_E3_H

#ifdef __cplusplus
extern "C" {
#endif
/********************************************************************************************************
 *                                      Include header files                                            *
 *******************************************************************************************************/
#include "Adc_Types.h"
#include "Adc_ConfigTypes.h"
#include "Adc_Cfg.h"

#define ADC_BIT_ENABLE 1UL
#define ADC_BIT_DISABLE 0UL
#define ADC_BITFIELD_MASK(bitWidth)   ((1UL << (bitWidth)) - 1UL)
#define ADC_POLLING_TIMEOUT_VALUE   500000U

/* safe domain adc num: 6 Lp domain adc num: 1 */
#define ADC_MODULE_NUMBER           7U
#define ADC_SF_MODULE_NUMBER        6U
#define ADC_CACHE_LINE              CACHE_SIZE
#define ADC_WORD_TO_BYTE            4U
#define ADC_CACHE_ALIGN_SIZE(size)  ((((size)%ADC_CACHE_LINE) == 0) ? (size) : (ADC_CACHE_LINE*(((size)/ADC_CACHE_LINE) + 1)))


#define ADC_EACH_RC_TIMMER_TRG_MODE 0U
#define ADC_EACH_RC_SOFT_TRG_MODE 1U

#define ADC_HTC_READY_LEN_RESET_VALUE   0U
#define ADC_HTC_DONE_LEN_RESET_VALUE   0U

#define ADC_SCHEDULER_MASTER_MODE   1U
#define ADC_SCHEDULER_SLAVE_MASTER_MODE_RESET_VALUE 0U
#define ADC_SCHEDULER_ASYNC_MODE    0U
#define ADC_SCHEDULER_ASYNC_SYNC_MODE_RESET_VALUE    0U

#define ADC_RC_TIMER_CNT            4U
#define ADC_RC_TMR_MODE_RESET_VALUE 0U
#define ADC_RC_TRG_MODE_RESET_VALUE 0U
#define ADC_RC_TRG_EN_RESET_VALUE   1U
#define ADC_RC_TRG_TIME_RESET_VALUE 0U
#define ADC_TRIGGER_LONGEST_TIME    275U

#define ADC_SUBFIFO_ID(id)          (id)
#define ADC_SUBFIFO_3               3U
#define ADC_SUBFIFO_CNT             4U
#define ADC_FIFO_32BIT_MODE         1U
#define ADC_FIFO_POLIING_MAX_TIME   128U
#define ADC_FIFO_PACK_MODE_RESET_VALUE  0U
#define ADC_SUBFIFO_START_ADDR_RESET_VALUE 0U
#define ADC_SUBFIFO_THRD_RESET_VALUE 7U
#define ADC_SUBFIFO_EN_RCHT_RC_RESET_VALUE 0U

#define ADC_CONFIG_ANA_REG_CNT      8U
#define ADC_VREFP1 0U
#define ADC_VREFP2 1U
#define ADC_VREREF_RESET_VALUE      0U
#define ADC_SAMPLE_CTRL_RESET_VALUE 0U

#define ADC_CLK_CTRL_RESET_VALUE    0U

#define ADC_DMA_CTRL_RESET_VALUE    0U

#define ADC_APDA_CTRL_SF_CNT        96U
#define ADC_APDA_CTRL_LP_CNT        4U

#define ADC_CONV_VALUE_BIT_WIDTH    12U
#define ADC_CHNL_PHYSICAL_ID_START_BIT_IN_CONV_VALUE 12U
#define ADC_CHNL_PHYSICAL_ID_BITWIDTH 3U
#define ADC_CHNL_MUX_ID_START_BIT_IN_CONV_VALUE 18U
#define ADC_CHNL_MUX_ID_BITWIDTH 3U
#define ADC_CHNL_END_START_BIT_IN_CONV_VALUE 15U
#define ADC_RCHT_ENTRY_CNT 32U
#define ADC_EACH_RC_ENTRY_CNT   16U
#define ADC_RC_ENTRY_TOTAL_CNT  64U
#define ADC_RCHT_RC_ENTRY_RESET_VALUE   0U


#define ADC_INT_STA_EN_RESET_VALUE 0U
#define ADC_INT_SIG_EN_RESET_VALUE 0U
#define ADC_INIT_INITVALUE_RESET_AND_CONFIG_VALUE 0x4E20U
#define ADC_INIT_INITVALUE_CLEAR_FIFO_CONFIG_VALUE 0x10U

#define SADC_INT_STA_ALL (0xFFFFFFFFUL)

#define SADC_INT_STA_EN_ALL (0UL)

#define SADC_INT_SIG_EN_ALL (0UL)

/* each adc unit has 9 conversion value monitors */
#define ADC_MONITOR_CNT 9U
/* adc monitor high threshold configuration */
/* this configuration is used for preventing sem error */
#define ADC_MONITOR_FULL_MASK_VALUE 0xFFFU
/* adc monitor high threshould reset value */
#define ADC_MONITOR_RESET_MASK_VALUE 0U

#if (ADC_DMA_SUPPORTED == STD_ON) /* AdcEnableDmaTransferMode enabled */
#define ADC_DMA_PER_UNIT_CHNL_CNT 2U
#define ADC_DMA_PER_GROUP_MAX_VALUE_CNT 40U

#define ADC_ODD_DMA_START_MUX_ID  74U
#define ADC_EVEN_DMA_START_MUX_ID 70U

#endif /* AdcEnableDmaTransferMode enabled */

#define ADC_BASE_ADDRESS_INTERVAL   (0x10000UL)

/* Analog Digital Converter 1 */
#define ADC1_BASE_ADDRESS (0xF8490000UL)
#define ADC2_BASE_ADDRESS (0xF84A0000UL)
#define ADC3_BASE_ADDRESS (0xF84B0000UL)
#define ADC4_BASE_ADDRESS (0xF8110000UL)
#define ADC5_BASE_ADDRESS (0xF8120000UL)
#define ADC6_BASE_ADDRESS (0xF8130000UL)
#define ADC7_BASE_ADDRESS (0xF0490000UL)
#define ADC_ANALOG_CTRL_BASE (0xF8450000UL)
/* load trim value register */
#define APBMUX_EFUSEC_BASE      (0xF0420000UL)
#define ADC_ROM_TRIM_CFG_BASE   (0x1044UL)
#define ADC_ROM_TRIM_EN         (0x1UL << 23)
#define ADC_TC_TRIM_VAL         (0U)

#define ADC_RSTGEN_CTRL_BASE                (0xF8050000UL)
#define ADC_RSTGEN_ADC_RESET(idx)           (0x1304UL + (8UL*(72UL + (idx))))
#define ADC_RSTGEN_ADC_RESET_OFFSET         (0u)
#define ADC_RSTGEN_ADC_RESET_ASSERT         (0u)
#define ADC_RSTGEN_ADC_RESET_DEASSERT       (1u)
#define ADC_RSTGEN_ADC_RESET_STA_OFFSET     (29u)
#define ADC_CKGEN_CTRL_BASE                 (0xF8060000UL)
#define ADC_CKGEN_ADC_CLOCK_GATE(idx)       (0x4004UL + (8UL*(349UL + (idx))))
#define ADC_CKGEN_ADC_CLOCK_GATE_OFFSET     (0u)
#define ADC_CKGEN_ADC_CLOCK_GATE_STA_OFFSET (5u)
#define ADC_CKGEN_ADC_CLOCK_GATING          (0u)
#define ADC_CKGEN_ADC_CLOCK_UNGATING        (1u)


/* apda ctrl lp domain register */
#define ADC_SCR_LP_BASE         (0xF07C0000UL)

/* adc core max support: 0-3:R52, 4-7: r52 virtual, 8-9: lp and se */
#define ADC_CORE_NUM_MAX        4U

/********************************************************************************************************
 *                     Global Variable Declarations
 *******************************************************************************************************/
/** \brief  save the core handler config */
extern Adc_CoreHandlerType *const Adc_Handler[ADC_CORE_NUM_MAX];

/********************************************************************************************************
 *                                      Fcuntion                                                        *
 *******************************************************************************************************/
/********************************************************************************************************
 * \brief This function gets core id information.

 * \verbatim
 * Syntax             : Adc_CoreIdType Adc_Ip_GetCoreId(void)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : None

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       :core id information

 * Description        : This function gets core id information.
 * \endverbatim
 * Traceability       : 
 *******************************************************************************************************/
Adc_CoreIdType Adc_Ip_GetCoreId(void);

/********************************************************************************************************
 * \brief This function checks whether Adc driver has been initialized.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_CheckInitNotYet(
 *                          void)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : None

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_UNINIT: Adc driver is not initialized
 *                      Others: No error

 * Description        : This function checks whether Adc driver has been initialized.
 * \endverbatim
 * Traceability       : SWSR_ADC_064 SWSR_ADC_072 SWSR_ADC_082 SWSR_ADC_094
 *                      SWSR_ADC_103 SWSR_ADC_109 SWSR_ADC_115 SWSR_ADC_122
 *                      SWSR_ADC_130 SWSR_ADC_137 SWSR_ADC_143 SWSR_ADC_146
 *                      SWSR_ADC_150 SWSR_ADC_177 SWSR_ADC_189 SWSR_ADC_190
 *                      SW_SM001
 *******************************************************************************************************/
Adc_ErrorIdType Adc_CheckInitNotYet(void);

/********************************************************************************************************
 * \brief This function init Adc driver in Ip level.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_Init(
 *                          const Adc_ConfigType* adcIpCfgPtr)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : adcIpCfgPtr - Pointer to configuration set

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_NO_ERROR:   no error
 *                      Others:         config failed

 * Description        : This function init Adc driver in Ip level
 * \endverbatim
 * Traceability       : SWSR_ADC_053 SWSR_ADC_054 SWSR_ADC_055
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_Init(const Adc_ConfigType *adcIpCfgPtr);

#if (ADC_DEINIT_API == STD_ON)
/********************************************************************************************************
 * \brief This function returns Adc register to power set state.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_DeInit(
 *                          void)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : None

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_FIFO_POLLING_TIMEOUT: Fifo clear time out
 *                      Other: No error

 * Description        : This function returns Adc register to power set state.
 * \endverbatim
 * Traceability       : SWSR_ADC_067
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_DeInit(void);
#endif /* #if (ADC_DEINIT_API == STD_ON) */

#if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
/********************************************************************************************************
 * \brief This function starts all channels converison of the requested Adc group.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_StartGroupConversion(
 *                          Adc_GroupType ipGroupId)

 * Service ID[hex]    : None

 * Sync/Async         : Asynchronous

 * Reentrancy         : Reentrant

 * Parameters (in)    : ipGroupId - Numeric ID of requested ADC Channel group

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_FIFO_POLLING_TIMEOUT: Fifo clear time out
 *                      Other: No error

 * Description        : This function starts all channels converison of the
 *                      requested Adc group.
 * \endverbatim
 * Traceability       : SWSR_ADC_074
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_StartGroupConversion(Adc_GroupType ipGroupId);

/********************************************************************************************************
 * \brief This function stops all conversions of channels of the requested Adc Group.
 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_StopGroupConversion(
 *                          Adc_GroupType ipGroupId)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Reentrant

 * Parameters (in)    : ipGroupId - Numeric ID of requested ADC Channel group

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_FIFO_POLLING_TIMEOUT: Fifo clear time out
 *                      Others: No errors

 * Description        : This function stops all conversions of channels of the
 *                      requested Adc Group.
 * \endverbatim
 * Traceability       : SWSR_ADC_085 SWSR_ADC_087
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_StopGroupConversion(Adc_GroupType ipGroupId);
#endif /*#if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON) */

#if (ADC_HW_TRIGGER_API == STD_ON)
/********************************************************************************************************
 * \brief This function enables the hardware trigger for the requested ADC Channel group
 *        in Ip level.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_EnableHardwareTrigger(
 *                          Adc_GroupType ipGroupId)

 * Service ID[hex]    : None

 * Sync/Async         : Asynchronous

 * Reentrancy         : Reentrant

 * Parameters (in)    : ipGroupId - Numeric ID of requested ADC Channel group

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_FIFO_POLLING_TIMEOUT: Fifo clear time out
 *                      Others: No errors

 * Description        : This function enables the hardware trigger for the requested
 *                      ADC Channel group in Ip level.
 * \endverbatim
 * Traceability       : SWSR_ADC_167
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_EnableHardwareTrigger(Adc_GroupType ipGroupId);

/********************************************************************************************************
 * \brief This function disables the hardware trigger for the requested
 *        ADC Channel group.

 * \verbatim
 * Syntax             : Adc_ErrorIdType Adc_Ip_DisableHardwareTrigger(
 *                          Adc_GroupType ipGroupId)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Reentrant

 * Parameters (in)    : ipGroupId - Numeric ID of requested ADC Channel group

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : ADC_E_FIFO_POLLING_TIMEOUT: Fifo clear time out
 *                      Others: No errors

 * Description        : This function disables the hardware trigger for the requested
 *                      ADC Channel group.
 * \endverbatim
 * Traceability       : SWSR_ADC_180
 *******************************************************************************************************/
Adc_ErrorIdType Adc_Ip_DisableHardwareTrigger(Adc_GroupType ipGroupId);
#endif /* #if (ADC_HW_TRIGGER_API == STD_ON) */

/********************************************************************************************************
 * \brief This function change power state in ip level.

 * \verbatim
 * Syntax             : void Adc_Ip_SetPowerState(
 *                          Adc_PowerStateType targetPowerState)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : targetPowerState - power state ready to be set

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : None

 * Description        : This function change power state in ip level.
 * \endverbatim
 * Traceability       : SWSR_ADC_134 SWSR_ADC_191
 *******************************************************************************************************/
void Adc_Ip_SetPowerState(Adc_PowerStateType targetPowerState);

/********************************************************************************************************
 * \brief This function is ISR for Adc Driver.

 * \verbatim
 * Syntax             : void Adc_EndGroupConversion(
 *                          Adc_HwUnitType hardwarePhysicalId)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Reentrant

 * Parameters (in)    : hardwarePhysicalId - Physical Id for Adc Unit

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : None

 * Description        : This function is ISR for Adc Driver.
 * \endverbatim
 * Traceability       : SWSR_ADC_155 SWSR_ADC_190
 *******************************************************************************************************/
void Adc_EndGroupConversion(Adc_HwUnitType hardwarePhysicalId);

/********************************************************************************************************
 * \brief This function enable CCT for reduce leakage.

 * \verbatim
 * Syntax             : void Adc_Ip_EnableCCT(Adc_HwModuleIndexType adcId, uint8 sampleTime,
                                              uint16 valueCCT)

 * Service ID[hex]    : None

 * Sync/Async         : Synchronous

 * Reentrancy         : Non reentrant

 * Parameters (in)    : adcId - 0:ADC1,1:ADC2,2:ADC3
                        sampleTime - ADC channel sampleTime control 0~7(meanning ref to SAMCTRL on TRM)
                        valueCCT - n means n+1 ana_clk

 * Parameters (inout) : None

 * Parameters (out)   : None

 * Return value       : None

 * Description        : This function enable CCT for reduce leakage.
                        When an adc samples multiple channels, some sampling high voltage and some
                        sampling low voltage, it is necessary to enable the CCT discharging after
                        Adc_Init, and valueCCT needs to be set to meet the conditions:
                        1) 1.5us <= valueCCT*ana_clk < samctrl*ana_clk
                        2) valueCCT as small as possible
 * \endverbatim
 *******************************************************************************************************/
void Adc_Ip_EnableCCT(Adc_HwModuleIndexType adcId, uint8 sampleTime, uint16 valueCCT);

#ifdef __cplusplus
}
#endif
#endif /* ADC_HW_E3_H */
/* End of file */
